Digital-to-analog converters (DACs) can be used to convert digital signals into an analog representation of the same signal. DACs can be used in wide variety of applications, ranging from medical and entertainment to communications (both for voice and data). One form of DAC that is commonly used is what is known as a sigma-delta DAC. A sigma-delta DAC can make use of a sigma-delta modulator to convert an oversampled, band-limited digital signal into an output signal. Note that the output signal may be a single-bit (representing two levels) signal or a multi-bit (representing 2N levels, wherein N is the number of bits) signal. The output signal can then be converted into an analog signal via a conventional DAC and then filtered by a smoothing filter to provide an analog representation of the digital signal. An advantage of a sigma-delta DAC is the noise shaping that is inherent in the design of the DAC. The noise shaping increases as the oversampling rate of the sigma-delta DAC increases. It may be preferred that a sigma-delta modulator for a sigma-delta DAC oversample at a rate of 32 or 64 (or higher).
A design of a sigma-delta modulator can feature differing values for order (which can specify the sharpness of the noise shaping performed by the sigma-delta modulator), the number of bits in the output signal (which can affect the stability and noise level of the modulator), stability handling techniques, and so forth. A fairly standard sigma-delta modulator may be a first order sigma-delta modulator with a single-bit output signal. The design of such a sigma-delta modulator can be relatively straight forward, therefore, easy and inexpensive to design. Furthermore, with a single-bit output signal, the routing of the output signal line can be relatively simple.
One disadvantage of the prior art is that of being a low-order sigma-delta modulator, noise suppression may not occur as rapidly as desired or needed, i.e., the order is not high enough. Sufficient noise suppression may simply require a higher order sigma-delta modulator, which can be more difficult to design and may not be able to operate at sufficient frequencies.
A second disadvantage of the prior art is that the use of a single bit output line can require that the sigma-delta modulator operate at a higher frequency than a similar sigma-delta modulator with multiple bit output lines. Since power consumption rises with the square of the operating frequency, the sigma-delta demodulator operating at a lower frequency can consume less power.
Another disadvantage of the prior art is that the high oversampling rate of the sigma-delta modulator (32, 64, or higher) can result in a design that may be hard to clock, especially if the signal being converted has a high clock rate of its own. For example, given a signal with a clock rate of 4 MHz, a sigma-delta modulator with an oversampling rate of 32 would require a clock of 128 MHz, while a 64 times oversampling sigma-delta modulator would require a clock of 256 MHz.